2003 Microchip Technology Inc.
DS39582B-page 39
PIC16F87XA
3.7
Protection Against Spurious Write
There are conditions when the device should not write
to the data EEPROM or Flash program memory. To
protect against spurious writes, various mechanisms
have been built-in. On power-up, WREN is cleared.
Also, the Power-up Timer (72 ms duration) prevents an
EEPROM write.
The write initiate sequence and the WREN bit together
help prevent an accidental write during brown-out,
power glitch or software malfunction.
3.8
Operation During Code-Protect
When the data EEPROM is code-protected, the micro-
controller can read and write to the EEPROM normally.
However, all external access to the EEPROM is
disabled. External write access to the program memory
is also disabled.
When program memory is code-protected, the microcon-
troller can read and write to program memory normally,
as well as execute instructions. Writes by the device may
be selectively inhibited to regions of the memory depend-
ing on the setting of bits WR1:WR0 of the configuration
tional information). External access to the memory is also
disabled.
TABLE 3-1:
REGISTERS/BITS ASSOCIATED WITH DATA EEPROM AND
FLASH PROGRAM MEMORIES
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-on
Reset
Value on
all other
Resets
10Ch
EEDATA
EEPROM/Flash Data Register Low Byte
xxxx xxxx
uuuu uuuu
10Dh
EEADR
EEPROM/Flash Address Register Low Byte
xxxx xxxx
uuuu uuuu
10Eh
EEDATH
EEPROM/Flash Data Register High Byte
xxxx xxxx
---0 q000
10Fh
EEADRH
EEPROM/Flash Address Register High Byte
xxxx xxxx
---- ----
18Ch
EECON1
EEPGD
WRERR
WREN
WR
RD
x--- x000
---0 q000
18Dh
EECON2
EEPROM Control Register 2 (not a physical register)
---- ----
0Dh
PIR2
CMIF
—EEIF
BCLIF
CCP2IF
-0-0 0--0
8Dh
PIE2
CMIE
—EEIE
BCLIE
CCP2IE
-0-0 0--0
Legend:
x
= unknown, u = unchanged, - = unimplemented, read as ‘0’, q = value depends upon condition.
Shaded cells are not used by data EEPROM or Flash program memory.
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